1. Field of the Invention
The present invention relates to signal processing, and, in particular, to error-correction encoding and decoding techniques such as low-density parity-check (LDPC) encoding and decoding.
2. Description of the Related Art
In attempting to recover an error-correction-encoded codeword, an error-correction decoder may encounter one or more trapping sets that prevent the decoder from properly decoding the codeword. Trapping sets, which represent subgraphs in a Tanner graph of an error-correction code, typically have a strong influence on error-floor characteristics of the error-correction code because a trapping set may force the decoder to converge to an incorrect result. To improve error-floor characteristics, a turbo equalizer, in which the error-correction decoder resides, may employ different techniques to, for example, (i) break the trapping sets and/or (ii) prevent the error-correction decoder from converging on trapping sets.